![]() ![]() Intel has no doubt moved to this new release model in an attempt to get back to a regular product and platform cadence as it struggles with the technological challenges of bringing new fabrication nodes to volume production. Transistors are rapidly approaching the physical limits of traditional semiconductor geometries, and the famous Moore's Law regarding transistor density has been formally acknowledged to no longer be valid. This development is not unexpected, as semiconductor foundries have had increasingly tough times creating smaller process nodes as fabrication of smaller transistors has become increasingly expensive and complex. We expect to lengthen the amount of time we will utilize our 14nm and our next-generation 10nm process technologies, further optimizing our products and process technologies while meeting the yearly market cadence for product introductions. ![]() Instead, Intel will move to a new "Process-Architecture-Optimization" model for the current 14 nm node and the 10 nm node.Īs part of our R&D efforts, we plan to introduce a new Intel Core microarchitecture for desktops, notebooks (including Ultrabook devices and 2 in 1 systems), and Intel Xeon processors on a regular cadence. In the face of the difficulties in maintaining the tick-tock cadence, Intel has announced that the launch of Kaby Lake this year as the third member of the 14-nm family following Broadwell and Skylake will mark the official end of the tick-tock strategy. But with chip updates stretching about beyond a yearly cycle in recent generations, Apple's product launch cycles have started to be affected. The tick-tock release cycle allowed Intel to reestablish dominance in both the consumer and enterprise CPU markets and had given OEMs such as Apple a regular update cycle to rely on for annual product updates. Over the past ten years, Intel has successively delivered new processor families based on this tick-tock cycle on a nearly annual cycle from its 65 nm manufacturing node all the way up until recently. Intel originally introduced the product cadence to the world in 2006 with the launch of the "Core" microarchitecture, alternating "ticks" of shrinking chip fabrication processes with "tocks" of new architectures. The first step was to launch a new engraving on a mastered architecture, the next year a new architecture was introduced to take advantage of this improved thinness and, finally, the third year was used to optimize all this.In its latest 10-K annual report (PDF) filed last month, Intel confirmed the end of its long-heralded "tick-tock" strategy of delivering new microprocessors to the market. Intel was talking about a new strategy in three steps, over three years: process / architecture / optimization. In reality, a tick could also be accompanied by some new features, but this was not the main element.Ī strategy that Intel maintained for a decade, but then abandoned when it seemed unable to keep up. In the first year (tock), Intel launched a new architecture based on a previously tested chip, while the following year, the tick was an opportunity to introduce a new chip while keeping the previous architecture. It was an alternation between two technical evolutions. ![]() The scheme was then called tick-tock and the idea was quite simple. More ambitious and enthusiastic than ever, Intel is talking about a return to shorter cycles for its future processors.įrom 2006 to 2016, Intel had implemented a two-year evolution cycle for its processors. ![]()
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